In a high-withstand-voltage lateral transistor, improvement of a layout for a plane-shaped device end portion has been conventionally performed in order to improve an ON-withstand voltage of the transistor. Here, two examples will be given and described below based on plane layout drawings in FIGS. 7 and 8.
According to a first conventional example, as illustrated in FIG. 7, a P-type body region 1 envelops an N+ drain region 5 and an N-type drain-drift region 4 in a lateral NMOS transistor. A gate electrode 3 is formed so as to overlap with an end portion of the P-type body region 1. Furthermore, a semicircular and plane-shaped end portion of the P-type body region 1 has a part at which the date electrode 3 and an N+ source region 2 are not adjacent to each other. With this structure, since an end portion of the device has no source region 2, current density can be reduced at an end portion of the drain region 5, and thus a problem that the drain current density increases at the end portion and a Kirk effect degrades an ON-withstand voltage, can be solved.
According to a second conventional example, as illustrated in FIG. 8, an N+ drain region 5 and an N-type drain-drift region 4 envelop an N+ source region 2 and a P-type body region 1 in a lateral NMOS transistor. A gate electrode 3 is formed so as to overlap with an end portion of the P-type body region 1. Furthermore, a semicircular and plane-shaped end of the P-type body region 1 has a part at which the gate electrode 3 and the N+ source region 2 are not adjacent to each other. This structure includes the N+ drain region provided on the outer circumference with respect to the N+ source region in comparison to the conventional example 1. Thus, the radius of curvature of the drain-drift region increases and drain current density at a further end portion can be reduced. Accordingly, improvement of an ON-withstand voltage can be further expected in comparison to the first conventional example.